1. Field of the Invention
This invention relates to integrated semiconductor structures and circuits and more particularly to memory structures and circuits which employ a capacitor for storing binary digits of information.
2. Description of the Prior Art
Integrated semiconductor memory circuits, particularly those employing cells which include essentially a storage capacitor and a switch, have achieved high memory cell densities. One of the simplest circuits for providing small memory cells is described in commonly assigned U.S. Pat. No. 3,387,286, filed July 14, 1967, by R. H. Dennard. Each of these cells employs a storage capacitor and a field effect transistor acting as a switch to selectively connect the capacitor to a bit sense line. In also commonly assigned U.S. Pat. Nos. 3,811,076, by W. M. Smith, and 3,841,926, by R. H. Garnache and W. M. Smith, both filed Jan. 2, 1973, there is disclosed a one device field effect transistor memory cell of the type described in the above-identified Dennard patent which is made to a small size by utilizing a layer of doped polycrystalline silicon separated by a dielectric medium disposed on the surface of a semiconductor substrate for forming a storage capacitor.
In another commonly assigned U.S. Pat. No. 3,979,734, filed on June 16, 1975, by W. D. Pricer and J. E. Selleck, there is described a memory array made of small cells which employ storage capacitors and bipolar transistors. In this latter array, which is word organized, each storage capacitor of these cells has simply one capacitor terminal connected to a separate bit sense line while selected cells forming a word are simultaneously accessed by utilizing a word pulse for coupling to the other terminal of the storage capacitors of that word. By simultaneously accessing the other terminal of all storage capacitors of a particular word, isolation between cells of the word is not required. This bipolar transistor memory array has a high performance since bipolar transistors used therein inherently operate faster than do field effect transistors. Many known bipolar transistors, for example, of the type disclosed in U.S. Pat. No. 3,904,450, made by diffusing impurities from polysilicon into a semiconductor substrate may be used to provide a bipolar memory array with a satisfactory performance, however, in order to provide higher performance memory arrays very high performance transistors are required.